There is a significant increase in the use of optics in computing systems. Semiconductor photonics are increasingly used to meet the increased use of optics. Semiconductor photonics can be integrated on an integrated circuit (I/C) with known processing techniques. The resulting photonic I/Cs (PIC) have a small form factor, and can be integrated into circuits for use in telecommunication and data communication, biomedical devices, bio-sensing systems, gaming systems, and other uses.
There has been an interest in the use of silicon-based photonics (Si photonics) because of the fact that Si photonics materials processing is compatible with standard CMOS (complementary metal-oxide semiconductor) fabrication techniques and equipments. The pervasive use and knowledge of silicon processes allows for the design and manufacture of very compact Si photonics devices with current techniques.
However, coupling light into and out of sub-micron semiconductor devices such as silicon-on-insulator (SOI) PICs with high efficiency is difficult because of a small waveguide mode size and attendant large optical beam divergence. Current techniques involve the use of a surface grating coupler (GC) formed by periodically etching a SOI waveguide, so light can then be coupled out of the plane of the planar PICs. Unlike edge coupling where polished optical facets of singulated devices (e.g., dies) are required, the use of GCs allows access to the devices from the wafer surface and therefore enables wafer-level testing and characterization, which is essential for high-volume manufacture demand.
A major drawback with GCs is that their coupling efficiency is typically lower than that of an edge coupling method. GCs may be more efficient at certain processing thicknesses than at others. For example, traditional GC designs have relatively high efficiency when coupling to a 220 nm SOI platform, but the efficiency decreases rapidly with increasing SOI thickness. Given that a preferred integration platform for SOI PICS is based on a 400 nm thickness, the coupling efficiency of the GC is significantly reduced.
Additionally, conventional GC designs usually feature high back-reflection as a result of the enhancement of coupling efficiency by a deep etch into the SOI. The back-reflection can easily cause instability when operating a integrated laser, as well as causing uncertainties in measuring device spectral responses. Traditionally, when light propagates in the waveguide and reaches the GC region, it gets scattered by the periodic structures of GC. Some scattered power is directed out of the waveguide plane as desired, and some is scattered downwards into the substrate and lost.
Therefore, traditional coupling efficiency as determined by the power scattered into the substrate is usually limited to a maximum of −3 dB. However, factoring in other loss mechanisms such as fabrication imperfections and mode mismatch between GC and coupling fiber usually results in a typically achievable coupling efficiency of less than −6 dB.
Descriptions of certain details and implementations follow, including a description of the figures, which may depict some or all of the embodiments described below, as well as discussing other potential embodiments or implementations of the inventive concepts presented herein. An overview of embodiments of the invention is provided below, followed by a more detailed description with reference to the drawings.